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任天堂2平台:RT5392_preliminary_101210.pdf


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RT5392_preliminary_101210.pdf
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IIIIIII DSRT5392_V1.0_081710 - I - Form No.:QS-073-F02 Rev.:1 Kept by:DCC Ret. Time:5 Years Datasheet RT5392 Preliminary Revision September8, 2010 Product Description The RT5392 is a highly integrated MAC/BBP and 2.4 GHz RF/PA/LNA single chip with 300Mbps PHY rate supporting. It plies with IEEE 802.11n and IEEE 802.11 b/g feature rich wireless connectivity at high standards, delivers reliable, cost-effective, throughput from an extended distance. Optimized RF architecture and baseband algorithms provide superb performance and low power consumption. Intelligent MAC design deploys a high efficient DMA engine and hardware data processing accelerators without overloading the host processor. The RT5392 is designed to support standard based features in the areas of security, quality of service and international regulation, giving end users the greatest performance anytime in any circumstance. Features CMOS Technology with PA, LNA, RF, Baseband, and MAC Integrated. 2T2R Mode with 300Mbps PHY Rate for Both Transmit and Receiving. Legacy and High Throughput Modes 20MHz/40MHz Bandwidth Reverse Direction Grant Data Flow and Frame Aggregation WEP 64/128, WPA, WPA2,TKIP, AES, WAPI QoS-WMM, WMM-PS WPS,PIN,PBC Multiple BSSID Support PCI Express 1.1 X Support Bluetooth Co-existence Low Power with Advanced Power Management Operating Systems - Windows XP 32/64, 2000, Vista 32/64 , Linux, Macintosh Order Information Ralink Technology, Corp. (Taiwan) 5th F. No. 36, Taiyuan St, Jhubei City, Hsin-Chu, Taiwan, R.O.C. Tel: 886-3-567-8868 Fax: 886-3-567-8818 Ralink Technology, Corp. (USA) 20833 Stevens Creek Blvd, Suite 200 Cupertino CA 95014 Tel: (408) 725-8070 Fax: (408)725-8069 ctional Block Diagram Part Number Temp Range Package RT5392L -10~70 ℃ Green/RoHS Compliant 76LDQFN (9mmx9mm) Application ? IEEE802.11b/g/nWireless Local works ? PCI Express 1.1 Half-Size Mini Card, Mini Card, Express Card. Draft Change without notice DSRT5392_V1.0_081710 - i - Form No.:QS-073-F02 Rev.:1 Kept by:DCC Ret. Time:5 Years RT5392 Datasheet Preliminary Revision September8, 2010 Table of Content 1.PIN LAYOUT ....................................................................................................................................................................... 1 1.1 PIN LAYOUT ................................................................................................................................................................. 1 1.2 PIN DESCRIPTION ........................................................................................................................................................ 2 1.3 STRAPPING PIN ........................................................................................................................................................... 3 2MAXIMUM RATINGS AND 内容来自淘豆网时时彩平台 www.roa7e.cn转载请标明出处.
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